instruction pipeline meaning in Chinese
指令管线化
指令流水线
Examples
- Design of 3 - stage instruction pipeline 51 core
一种采用3级指令流水线的51内核设计 - Instruction to clear the instruction pipeline of any instruction that may have already been fetched from the cache line prior to the cache line being invalidated
指令，清除所有指令的指令管道，那些指令在高速缓存行被设为无效之前可能早已被取走了。 - The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block
设计的riscmcu采用14位字长指令总线和8位字长数据总线分离的harvard结构和二级指令流水设计，并使用硬布线逻辑代替微程序控制，加快了微控制器的速度，提高了指令执行效率。